N. Bajad, H. Kulkarni, S. Dhole, S. Thakur, S. Tonapi
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引用次数: 0
Abstract
The effect of solder joint size on wafer level chip scale package reliability has been studied through simulation. A two dimensional finite element model with different solder diameter (250μm, 300μm, 350μm) was studied under accelerated thermal cycling. The failure of the solder joints under thermal fatigue loading is influenced by the solder joint size. Finite element modelling can be used to study the design space and predict failure. In this paper, successive initiation method with energy partitioning approach is used for crack initiation and propagation in the solder joint. The number of thermal cycles to failure are calculated and compared for 250μm, 300μm, 350μm solder diameter.
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