Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892338
A. Udupa, G. Subbarayan, Cheng-Kok Koh
Analytical models of stress and deformxation of through-silicon vias (TSV), relative to numerical ones, have the advantage of being inexpensive to evaluate and in providing insight. They have the additional advantage of allowing one to embed them in ECAD tools for real time design decisions. Motivated by this reasoning, in this paper, an analytical model for the three-dimensional state of stress in a periodic array of TSVs is developed. The model accounts for the onset of plasticity in the copper via and predicts the out-of-plane protrusion that occurs in the via due to differential thermal expansion with the surrounding Si matrix. Excessive out-of-plane deformation of the top surface of the via has the potential to induce fracture causing stress in the brittle dielectric layers that lie above the via. The predictions of the model are consistent with experimentally determined values reported in the literature. The process and design parameters that are critical to limiting the extent of protrusion are identified, and these in turn are used to develop design guidelines.
{"title":"A model for the free (top) surface deformation of through-silicon vias","authors":"A. Udupa, G. Subbarayan, Cheng-Kok Koh","doi":"10.1109/ITHERM.2014.6892338","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892338","url":null,"abstract":"Analytical models of stress and deformxation of through-silicon vias (TSV), relative to numerical ones, have the advantage of being inexpensive to evaluate and in providing insight. They have the additional advantage of allowing one to embed them in ECAD tools for real time design decisions. Motivated by this reasoning, in this paper, an analytical model for the three-dimensional state of stress in a periodic array of TSVs is developed. The model accounts for the onset of plasticity in the copper via and predicts the out-of-plane protrusion that occurs in the via due to differential thermal expansion with the surrounding Si matrix. Excessive out-of-plane deformation of the top surface of the via has the potential to induce fracture causing stress in the brittle dielectric layers that lie above the via. The predictions of the model are consistent with experimentally determined values reported in the literature. The process and design parameters that are critical to limiting the extent of protrusion are identified, and these in turn are used to develop design guidelines.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"28 1","pages":"616-620"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84639640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892308
A. L. Goh, K. Ooi, U. Stimming
To meet the high cooling demand in the electronics industry, enhanced microchannel heat sinks were introduced. However, the intricacies and high costs associated with microfabrication technologies prove them unsuitable for application in conventional heat exchangers. Hence, the motivation to implement microscale passages in macro geometries ensues. In this study, the annular microchannel is formed by securing a cylindrical insert of mean diameter 19.4 mm concentrically within a cylindrical pipe of internal diameter 20 mm. The paper looks at heat transfer enhancement techniques using inserts of nature-inspired profiles. CFD simulations based on conventional theory were carried out to predict the heat transfer and flow characteristics in the microchannel, for length of 30 mm, mean hydraulic diameter of 600 μm, and under constant heat input of 500 W. Under flow condition of 4 L/min (0.0667 kg/s), convective heat transfer coefficient values of 33.7, 32.7, 30.4 and 26.2 kW/m2·K are obtained for the Durian, Inverted Fish Scale, Fish Scale and Plain profiles respectively. This corresponds to an enhancement of 29%, 25% and 16% respectively, relative to the Plain profile. In addition, using Inverted Fish Scale profile, flow condition of 8 L/min (0.133 kg/s) yield a significant convective heat transfer coefficient value of 59.2 kW/m2·K. The pressure drop values are found to be easily met by a commercially available pump.
{"title":"Nature-inspired enhanced microscale heat transfer in macro geometry","authors":"A. L. Goh, K. Ooi, U. Stimming","doi":"10.1109/ITHERM.2014.6892308","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892308","url":null,"abstract":"To meet the high cooling demand in the electronics industry, enhanced microchannel heat sinks were introduced. However, the intricacies and high costs associated with microfabrication technologies prove them unsuitable for application in conventional heat exchangers. Hence, the motivation to implement microscale passages in macro geometries ensues. In this study, the annular microchannel is formed by securing a cylindrical insert of mean diameter 19.4 mm concentrically within a cylindrical pipe of internal diameter 20 mm. The paper looks at heat transfer enhancement techniques using inserts of nature-inspired profiles. CFD simulations based on conventional theory were carried out to predict the heat transfer and flow characteristics in the microchannel, for length of 30 mm, mean hydraulic diameter of 600 μm, and under constant heat input of 500 W. Under flow condition of 4 L/min (0.0667 kg/s), convective heat transfer coefficient values of 33.7, 32.7, 30.4 and 26.2 kW/m2·K are obtained for the Durian, Inverted Fish Scale, Fish Scale and Plain profiles respectively. This corresponds to an enhancement of 29%, 25% and 16% respectively, relative to the Plain profile. In addition, using Inverted Fish Scale profile, flow condition of 8 L/min (0.133 kg/s) yield a significant convective heat transfer coefficient value of 59.2 kW/m2·K. The pressure drop values are found to be easily met by a commercially available pump.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"397-403"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80788960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892431
K. Yazawa, D. Kendig, K. Al-Hemyari, A. Shakouri
Packaging of optoelectronic devices becomes more and more challenging due to higher heat generation per unit volume. We experimentally investigated the packaging thermal resistance for a semiconductor laser device and compared results for two material alternatives for the electrical passivation layer. We used the time-resolved thermoreflectance technique to obtain the time response for the thermal diffusion. During this investigation, we also discovered another key factor related to the thermal resistance in addition to the passivation layer. The silicon substrate (~700 microns thick) also needs careful consideration for thermal diffusion. We observed some thermal islands across the thickness of the silicon substrate to diffuse and spread the heat. This local anisotropy, however, may be minor as the macroscopic temperature gradient is found to be reasonable. Nevertheless, this localized phenomenon may lead to performance variations in mass production. In the investigated package samples, minor voids and cracks were observed in the copper heat sink area. This may not be anticipated for final manufacturing, but these defects could result in localized higher thermal resistance for some of the arrayed device features on a chip. By using the transient thermoreflectance technique, the heat diffusion process can be observed. This imaging technique enables us to track the temperature over a wide range of time. The time response curve provides an indication of the thermal heat sinking performance of the package structure. The transient thermal response clearly shows two stages of temperature rise. One is the spreading thermal diffusion in the silicon substrate and the other is thermal diffusion into the copper heat sink. The thermal mass for both, is within the time range. In this case, the opposite side of the device of the copper heat sink is connected to the thermal ground with a small thermal resistance. The result demonstrates that a poly silicon passivation layer works better than silicon dioxide and decreases the thermal resistance by almost 30%.
{"title":"Transient thermal imaging characterization of a die attached optoelectronic device on silicon","authors":"K. Yazawa, D. Kendig, K. Al-Hemyari, A. Shakouri","doi":"10.1109/ITHERM.2014.6892431","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892431","url":null,"abstract":"Packaging of optoelectronic devices becomes more and more challenging due to higher heat generation per unit volume. We experimentally investigated the packaging thermal resistance for a semiconductor laser device and compared results for two material alternatives for the electrical passivation layer. We used the time-resolved thermoreflectance technique to obtain the time response for the thermal diffusion. During this investigation, we also discovered another key factor related to the thermal resistance in addition to the passivation layer. The silicon substrate (~700 microns thick) also needs careful consideration for thermal diffusion. We observed some thermal islands across the thickness of the silicon substrate to diffuse and spread the heat. This local anisotropy, however, may be minor as the macroscopic temperature gradient is found to be reasonable. Nevertheless, this localized phenomenon may lead to performance variations in mass production. In the investigated package samples, minor voids and cracks were observed in the copper heat sink area. This may not be anticipated for final manufacturing, but these defects could result in localized higher thermal resistance for some of the arrayed device features on a chip. By using the transient thermoreflectance technique, the heat diffusion process can be observed. This imaging technique enables us to track the temperature over a wide range of time. The time response curve provides an indication of the thermal heat sinking performance of the package structure. The transient thermal response clearly shows two stages of temperature rise. One is the spreading thermal diffusion in the silicon substrate and the other is thermal diffusion into the copper heat sink. The thermal mass for both, is within the time range. In this case, the opposite side of the device of the copper heat sink is connected to the thermal ground with a small thermal resistance. The result demonstrates that a poly silicon passivation layer works better than silicon dioxide and decreases the thermal resistance by almost 30%.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"24 1","pages":"1308-1312"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82755578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892344
G. Romagnoli, J. Buytaert, R. Dumps, A. Francescon, O. A. de Aguiar Francisco, K. Howell, A. Mapelli, G. Nuessle, P. Petagna
In the last years the Detector Technology group (PH-DT) [1] of the CERN Physics Department in Geneva, Switzerland, has started the study of novel micro-fluidic cooling systems obtained through standard micro-fabrication processes that outperform traditional cooling approaches for the thermal management of silicon particle detectors. The fabrication of the cooling devices starts with the etching of the microchannels in a silicon wafer; the channels are then closed with another silicon wafer through a direct bonding process. The devices are then interfaced to the front-end electronics of the detector via a thin adhesive layer. Silicon cooling devices with thickness of the order of few hundred microns guarantee the desired minimization of material in front of the tracking sensors and eliminate mechanical stresses due to the mismatch of Coefficient of Thermal Expansion (CTE) between the sensor and its related electronics. Combining the versatility of standard micro-fabrication processes with the high thermal efficiency typical of micro-fluidics, it is possible to produce effective thermal management devices that are well adapted to very different detector configurations.
{"title":"Micro-fluidic silicon cooling devices for particle tracking detectors","authors":"G. Romagnoli, J. Buytaert, R. Dumps, A. Francescon, O. A. de Aguiar Francisco, K. Howell, A. Mapelli, G. Nuessle, P. Petagna","doi":"10.1109/ITHERM.2014.6892344","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892344","url":null,"abstract":"In the last years the Detector Technology group (PH-DT) [1] of the CERN Physics Department in Geneva, Switzerland, has started the study of novel micro-fluidic cooling systems obtained through standard micro-fabrication processes that outperform traditional cooling approaches for the thermal management of silicon particle detectors. The fabrication of the cooling devices starts with the etching of the microchannels in a silicon wafer; the channels are then closed with another silicon wafer through a direct bonding process. The devices are then interfaced to the front-end electronics of the detector via a thin adhesive layer. Silicon cooling devices with thickness of the order of few hundred microns guarantee the desired minimization of material in front of the tracking sensors and eliminate mechanical stresses due to the mismatch of Coefficient of Thermal Expansion (CTE) between the sensor and its related electronics. Combining the versatility of standard micro-fabrication processes with the high thermal efficiency typical of micro-fluidics, it is possible to produce effective thermal management devices that are well adapted to very different detector configurations.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"40 1","pages":"658-665"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86211482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892426
P. Lall, D. Zhang, Vikas Yadav, J. Suhling, S. Shantaram
Leadfree solders have been used as interconnects in electronic packaging, due to its environmental friendly chemical property. However, those materials may experience high strain rates when subjected to shock and vibration. Consequently, failure will occur to electronics in those situations. Therefore, knowing the material properties of lead-free solders are extremely important, but research on mechanical behaviors of those solder alloys at high strain rates are scarce. Anand's viscoplastic constitutive model has been widely used to describe the inelastic deformation behavior of solders in electronic components under thermo-mechanical deformation. However, Anand's model constants for the transient dynamic strain rates are scarce. In this paper, the nine material parameters to fit the Anand viscoplastic model at high strain rates have been presented. In order to develop the constants for this model, uniaxial tensile tests at several strain rates and temperatures have been completed. A constrant strain rate impact hammer which enables attaining strain rates around 1 to 100 per sec has been employed to implement tensile tests and a small thermal chamber is applied to control testing temperature. High speed cameras operating at 70,000 fps have been used to capture images of specimen and then digital image correlation method is used to calculate tensile strain. Uniaxial stress-strain curves have been plotted over a wide range of strain rates (ε̇=10, 35, 50, 75 /sec) and temperatures (T = 25, 50, 75, 100, 125°C). Anand viscoplasticity constants have been calculated by non-linear fitting procedures. In addition, the accuracy of the extracted Anand constants has been evaluated by comparing the model prediction and experimental data.
{"title":"Material behavior of SAC305 under high strain rate at high temperature","authors":"P. Lall, D. Zhang, Vikas Yadav, J. Suhling, S. Shantaram","doi":"10.1109/ITHERM.2014.6892426","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892426","url":null,"abstract":"Leadfree solders have been used as interconnects in electronic packaging, due to its environmental friendly chemical property. However, those materials may experience high strain rates when subjected to shock and vibration. Consequently, failure will occur to electronics in those situations. Therefore, knowing the material properties of lead-free solders are extremely important, but research on mechanical behaviors of those solder alloys at high strain rates are scarce. Anand's viscoplastic constitutive model has been widely used to describe the inelastic deformation behavior of solders in electronic components under thermo-mechanical deformation. However, Anand's model constants for the transient dynamic strain rates are scarce. In this paper, the nine material parameters to fit the Anand viscoplastic model at high strain rates have been presented. In order to develop the constants for this model, uniaxial tensile tests at several strain rates and temperatures have been completed. A constrant strain rate impact hammer which enables attaining strain rates around 1 to 100 per sec has been employed to implement tensile tests and a small thermal chamber is applied to control testing temperature. High speed cameras operating at 70,000 fps have been used to capture images of specimen and then digital image correlation method is used to calculate tensile strain. Uniaxial stress-strain curves have been plotted over a wide range of strain rates (ε̇=10, 35, 50, 75 /sec) and temperatures (T = 25, 50, 75, 100, 125°C). Anand viscoplasticity constants have been calculated by non-linear fitting procedures. In addition, the accuracy of the extracted Anand constants has been evaluated by comparing the model prediction and experimental data.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"8 1","pages":"1261-1269"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74347285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892283
Thomas E. Sarvey, Yang Zhang, Yue Zhang, Hanju Oh, M. Bakir
Microfluidic cooling shows promise in cooling next generation 3D microsystems when integrated with through-silicon-vias. In this work, electrical and thermal effects of staggered micropin-fin heat sink dimensions are analyzed using deionized water. An experimental study of five different silicon micropin-fin arrays with a nominal height of 200 μm and diameters down to 30 μm was conducted at flow rates up to approximately 100mL/min and pressure drops up to approximately 200 kPa. The lowest convective thermal resistance achieved was 0.098 °C/W across a 1 cm2 die. These experimental results were then used to simulate temperature profiles of an interposer-cooled 3D stack.
{"title":"Thermal and electrical effects of staggered micropin-fin dimensions for cooling of 3D microsystems","authors":"Thomas E. Sarvey, Yang Zhang, Yue Zhang, Hanju Oh, M. Bakir","doi":"10.1109/ITHERM.2014.6892283","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892283","url":null,"abstract":"Microfluidic cooling shows promise in cooling next generation 3D microsystems when integrated with through-silicon-vias. In this work, electrical and thermal effects of staggered micropin-fin heat sink dimensions are analyzed using deionized water. An experimental study of five different silicon micropin-fin arrays with a nominal height of 200 μm and diameters down to 30 μm was conducted at flow rates up to approximately 100mL/min and pressure drops up to approximately 200 kPa. The lowest convective thermal resistance achieved was 0.098 °C/W across a 1 cm2 die. These experimental results were then used to simulate temperature profiles of an interposer-cooled 3D stack.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"62 1","pages":"205-212"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87699865","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892317
Alam Tamanna, P. Lee
Flow boiling microgap heat sink is attractive due to its high heat transfer capability in compact spaces with a smaller rate of coolant flow than its single phase counterpart. Other advantages of this method are the ease of fabrication and implementation (direct cooling). Although there is general agreement that this system may be able to maintain greater temperature uniformity across the heat sink and reduce flow boiling instabilities, their heat transfer and instability characteristics along with flow visualization in expanding microgap heat sink are unavailable in literature till date and require investigation.
{"title":"Investigation of flow boiling characteristics in expanding silicon microgap heat sink","authors":"Alam Tamanna, P. Lee","doi":"10.1109/ITHERM.2014.6892317","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892317","url":null,"abstract":"Flow boiling microgap heat sink is attractive due to its high heat transfer capability in compact spaces with a smaller rate of coolant flow than its single phase counterpart. Other advantages of this method are the ease of fabrication and implementation (direct cooling). Although there is general agreement that this system may be able to maintain greater temperature uniformity across the heat sink and reduce flow boiling instabilities, their heat transfer and instability characteristics along with flow visualization in expanding microgap heat sink are unavailable in literature till date and require investigation.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"4 1","pages":"458-465"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86562061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-09-08DOI: 10.1109/ITHERM.2014.6892297
D. Agonafer, K. Lopez, Y. Won, J. Palko, M. Asheghi, J. Santiago, K. Goodson
Phase separation in two-phase microfluidic exchangers is a promising strategy for reducing the required pumping power. Past research has focused on using hydrophobic nanoporous structures in order to extract water vapor and retain liquid within the vapor-cooling device. This study focuses on characterizing the bursting pressure, the maximum Laplace pressure for liquid containment, of nanoporous alumina membranes and micro-glass capillaries. The pore size diameters of the alumina membranes have a nominal diameter of 170 nm that can produce a pressure drop of 1.5 kPa for wetting dielectric liquids. In order to contain higher Laplace pressures, the pore geometry for 'pinning' of the fluid at the liquid-vapor interface needs to be optimized. Single glass micro-glass capillaries were used in order to study the 'pinning effect' of wetting fluids for various micro-capillary diameters. The glass capillary diameters ranged from 250-840 μm with measured Laplace pressures up to ~0.9 kPa. Experimental results agreed well with an analytical model that calculates the Laplace pressure as a function of pore geometry.
{"title":"Phase-separation of wetting fluids using nanoporous alumina membranes and micro-glass capillaries","authors":"D. Agonafer, K. Lopez, Y. Won, J. Palko, M. Asheghi, J. Santiago, K. Goodson","doi":"10.1109/ITHERM.2014.6892297","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892297","url":null,"abstract":"Phase separation in two-phase microfluidic exchangers is a promising strategy for reducing the required pumping power. Past research has focused on using hydrophobic nanoporous structures in order to extract water vapor and retain liquid within the vapor-cooling device. This study focuses on characterizing the bursting pressure, the maximum Laplace pressure for liquid containment, of nanoporous alumina membranes and micro-glass capillaries. The pore size diameters of the alumina membranes have a nominal diameter of 170 nm that can produce a pressure drop of 1.5 kPa for wetting dielectric liquids. In order to contain higher Laplace pressures, the pore geometry for 'pinning' of the fluid at the liquid-vapor interface needs to be optimized. Single glass micro-glass capillaries were used in order to study the 'pinning effect' of wetting fluids for various micro-capillary diameters. The glass capillary diameters ranged from 250-840 μm with measured Laplace pressures up to ~0.9 kPa. Experimental results agreed well with an analytical model that calculates the Laplace pressure as a function of pore geometry.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"36 1","pages":"306-316"},"PeriodicalIF":0.0,"publicationDate":"2014-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78402700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892418
D. Dumka, T. Chou
Thermal assessment of AlGaN/GaN heterostructure on diamond substrate is presented. To emphasize the advantages of diamond substrate for GaN, results of test devices on GaN-on-Diamond material are compared to those on GaN-on-SiC and GaN-on-Si materials. Mesa resistors and High Electron Mobility Transistors (HEMTs) fabricated using a 0.25 μm gate length process are characterized. Infrared thermography is employed for measurement of temperature rise in the test resistors and transistors at different power dissipation conditions. Addition of a simple feature to the conventional mesa resistor is found to allow a non-destructive, on-wafer compatible and more reliable surface temperature determination using IR thermography. DC current-voltage characteristics are included to show the impact of different substrates on the electrical behavior of HEMTs. Our results clearly demonstrate a significant thermal advantage of diamond substrate compared to SiC and Si substrate for GaN HEMTs designed for closely comparable electrical performance. For the same average channel temperature rise in the identical HEMTs, we estimate that GaN-on-Diamond material used in this study allows 1.7X dissipated power of GaN-on-SiC and 3X dissipated power of GaN -on-Si.
{"title":"Evaluation of thermal resistance of AlGaN/GaN heterostructure on diamond substrate","authors":"D. Dumka, T. Chou","doi":"10.1109/ITHERM.2014.6892418","DOIUrl":"https://doi.org/10.1109/ITHERM.2014.6892418","url":null,"abstract":"Thermal assessment of AlGaN/GaN heterostructure on diamond substrate is presented. To emphasize the advantages of diamond substrate for GaN, results of test devices on GaN-on-Diamond material are compared to those on GaN-on-SiC and GaN-on-Si materials. Mesa resistors and High Electron Mobility Transistors (HEMTs) fabricated using a 0.25 μm gate length process are characterized. Infrared thermography is employed for measurement of temperature rise in the test resistors and transistors at different power dissipation conditions. Addition of a simple feature to the conventional mesa resistor is found to allow a non-destructive, on-wafer compatible and more reliable surface temperature determination using IR thermography. DC current-voltage characteristics are included to show the impact of different substrates on the electrical behavior of HEMTs. Our results clearly demonstrate a significant thermal advantage of diamond substrate compared to SiC and Si substrate for GaN HEMTs designed for closely comparable electrical performance. For the same average channel temperature rise in the identical HEMTs, we estimate that GaN-on-Diamond material used in this study allows 1.7X dissipated power of GaN-on-SiC and 3X dissipated power of GaN -on-Si.","PeriodicalId":12453,"journal":{"name":"Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"71 1","pages":"1210-1214"},"PeriodicalIF":0.0,"publicationDate":"2014-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75666666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-05-27DOI: 10.1109/ITHERM.2014.6892411
P. Lall, P. Sakalaukus, Lynn Davis
An investigation of a solid-state lighting (SSL) luminaire with the focus on the electronic driver which has been exposed to a standard wet hot temperature operating life (WHTOL) of 85% RH and 85°C in order to assess reliability of prolonged exposer to a harsh environment has been conducted. SSL luminaires are beginning introduced as headlamps in some of today's luxury automobiles and may also be fulfilling a variety of important outdoor applications such as overhead street lamps, traffic signals and landscape lighting. SSL luminaires in these environments are almost certain to encounter excessive moisture from humidity and high temperatures for a persistent period of time. The lack of accelerated test methods for LEDs to assess long-term reliability prior to introduction into the marketplace, a need for SSL physics based PHM modeling indicators for assessment and prediction of LED life, as well as the U.S. Department of Energy's R&D roadmap to replace todays lighting with SSL luminaires makes it important to increase the understanding of the reliability of SSL devices, specifically, in harsh environment applications. In this work, a set of SSL electrical drivers were investigated to determine failure mechanisms that occur during prolonged harsh environment applications. Each driver consists of four aluminum electrolytic capacitors (AECs) of three different types and was considered the weakest component inside the SSL electrical driver. The reliability of the electrical driver was assessed by monitoring the change in capacitance and the change in equivalent series resistance for each AEC, as well as monitoring the luminous flux of the SSL luminaire or the output of the electrical driver. The luminous flux of a pristine SSL electrical driver was also monitored in order to detect minute changes in the electrical drivers output and to aid in the investigation of the SSL luminaires reliability. The failure mechanisms of the electrical drivers have been determined and are presented in this paper.
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