Modeling and analysis of vertical noise coupling between clock tree and channel routing wire in 3D mixed signal integration

Shiwei Wang, Yingtao Ding, Huanyu He, Jian-Qiang Lu
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引用次数: 1

Abstract

This paper reports on the vertical noise coupling between a clock wire in digital IC and channel routing wires in analog IC in 3D mixed signal integration. Full wave electromagnetic simulations are employed to evaluate the vertical noise coupling. The coupling mechanism is discussed with transfer impedance. Insights to vertical noise coupling between interconnects in 3D integration are offered and possible solutions are provided to reduce the noise.
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三维混合信号集成中时钟树与信道路由线垂直噪声耦合建模与分析
本文研究了三维混合信号集成中数字集成电路中的时钟线与模拟集成电路中的通道布线线之间的垂直噪声耦合问题。采用全波电磁仿真对垂直噪声耦合进行了评价。从传递阻抗的角度讨论了耦合机理。对三维集成中互连之间的垂直噪声耦合提供了见解,并提供了可能的解决方案来降低噪声。
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