An open-loop fractional divider based on direct phase synthesis

Pao-Lung Chen
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Abstract

This work presents an open-loop fractional divider based on direct phase synthesis. The proposed fractional divider is pure digital circuit and with low cost. It also has fast switching speed within 2 clock cycles. The fractional part can range from 2-1 ~ 2-24 with fine resolution. An example by using FPGA of proposed fractional frequency divider has been successfully developed.
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基于直接相位合成的开环分数分压器
本文提出了一种基于直接相位合成的开环分数分压器。所提出的分数分法器是纯数字电路,成本低。它还具有2个时钟周期内的快速切换速度。小数部分的范围为2-1 ~ 2-24,分辨率较好。利用FPGA成功地开发了分数分频器的实例。
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