A dual-voltage hybrid NEMS-CMOS low-power scheme

Abstract

In this paper we propose a dual-voltage hybrid NEMS-CMOS scheme to reduce dynamic power consumption. The scheme uses a smaller input/output voltage to propagate information, and a larger voltage to drive (control) the NEMS. CMOS amplifiers are used to interface these two voltages. Gates with a large(r) number of inputs perform better, which matches the optimal NEMS circuit topology. Simulations for a 4-input Boolean function show that power reductions can be significant.