Implementation of a resource-constrained ECC processor with power analysis countermeasure

Abstract

Several hardware implementations of elliptic curve cryptography have been recently proposed for resource-constrained applications but few of them considered the power analysis countermeasures. In this paper, a new modular multiplication with zero-value attack countermeasure is proposed. The Montgomery ladder algorithm and randomized projective coordinates method are used to resist simple power analysis and differential power analysis. The circular shift register has been adopted to reduce the area. The overall design has been implemented in binary field. 16.5K Gate Equivalent (GE) area is needed and 10.8ms is required for one scalar point multiplication at 13.56MHz. The implementation result shows that the proposed ECC processor achieves power analysis resistance with low resource cost.