A Low-Power Tapered Matrix Distributed Amplifier for Ultra-Wide-Band Applications

Abstract

A fully integrated tapered matrix distributed amplifier (DA) for broadband applications is presented in this paper. The DA is designed in the TSMC 180 nm CMOS RF process. For the gain improvement, the proposed DA employs a matrix architecture to take advantage of the additive and multiplicative gain mechanisms simultaneously. In addition, tapered transmission line technique is used to mitigate power consumption. Also, the terminating resistor of the input transmission line is replaced with an optimized RL-network to ameliorate the noise curve of the DA. In the first stage, the DA used a tunable cascode amplifier as the gain cells to extend the bandwidth. Based on simulation results, the proposed DA with a 3-dB bandwidth of 19.5 GHz demonstrates a flat power gain (S21) of $12+1\ \text{dB}$. Throughout the frequency range, S11 and S22 of the DA are below than −10 dB. The noise figure (NF) varies between 5 ∼ 6.75 dB and the average third-order input intercept point (IIP3) in the operating band is −3.75 dBm. The proposed DA consumes a DC power of 25 mW from a 1-V supply.