{"title":"Compact CMOS linear transconductor and four-quadrant analogue multiplier","authors":"M. Panovic, A. Demosthenous","doi":"10.1109/ISCAS.2004.1328287","DOIUrl":null,"url":null,"abstract":"This paper describes a low voltage/low power MOS linear transconductor which can be configured to realize a square-law function circuit and a four quadrant analogue multiplier. The compact analogue computation cells described are particularly suited to parallel processing systems. The circuits were fabricated using a 0.8 /spl mu/m CMOS process and operate from a 2 V power supply.","PeriodicalId":6445,"journal":{"name":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","volume":"18 1","pages":"I-685"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2004.1328287","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11
Abstract
This paper describes a low voltage/low power MOS linear transconductor which can be configured to realize a square-law function circuit and a four quadrant analogue multiplier. The compact analogue computation cells described are particularly suited to parallel processing systems. The circuits were fabricated using a 0.8 /spl mu/m CMOS process and operate from a 2 V power supply.
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