Noise Performance of Sub-100-nm Metamorphic HEMT Technologies

Abstract

This paper reports the small-signal and noise modeling of InGaAs metamorphic high-electron-mobility transistors at room temperature. Three technologies with gate length of 100 nm, 50 nm, and 35 nm are investigated and the mechanisms causing noise in the different devices are modeled. Technologies that have been scaled and processed in one foundry are modeled with the same model topology which allows for maximal comparability. In this way, a consistent comparison of the effects causing noise in sub-100 nm HEMTs is possible. It is shown that an increase of the channel noise in combination with increased gate leakage currents causes the noise figure to not improve as expected when scaling to ultra short gate length.