Process Development of 4-Die Stack Module Using Moldable Underfill

S. Chong, Hongyu Li, Ling Xie, S. Lim, Zhaohui Chen
{"title":"Process Development of 4-Die Stack Module Using Moldable Underfill","authors":"S. Chong, Hongyu Li, Ling Xie, S. Lim, Zhaohui Chen","doi":"10.1109/ECTC.2018.00347","DOIUrl":null,"url":null,"abstract":"Market is always looking for way to reduce the cost of package. Traditional way of protecting the fragile micro-bumps is by applying capillary underfill (CUF) to mitigate the issue of CTE mismatch between the die and the substrate. However, the use of CUF introduce additional assembly process on top of high material cost as compared to Moldable Underfill (MUF). In this paper, we explore the use of MUF for the 4-diue stack. MUF is very attractive as it combined the step of molding and underfilling into one single step in addition to the low material cost as compared to CUF. The reliability of MUF is much superior to CUF as shown in the simulation study. The simulation study indicates a drastic 1.65 times more fatigue life for MUF as compared to CUF. The 4 die stack is formed using conventional mass reflow process. The dies is stacked on top of each other on a bottom substrate wafer using conventional noclean flux. The whole substrate wafer with the 4 die stack is then send through a reflow oven to form the solder interconnect for all 4 die stacks. This approach is much prefer than individual thermo-compression process in terms of throughput and less thermal loading to the solder interconnects as no heat is applied to each die stacking process. We had demonstrated no void in the region between the solder bump after the MUF molding process.","PeriodicalId":6555,"journal":{"name":"2018 IEEE 68th Electronic Components and Technology Conference (ECTC)","volume":"204 1","pages":"2307-2312"},"PeriodicalIF":0.0000,"publicationDate":"2018-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 68th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2018.00347","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

Market is always looking for way to reduce the cost of package. Traditional way of protecting the fragile micro-bumps is by applying capillary underfill (CUF) to mitigate the issue of CTE mismatch between the die and the substrate. However, the use of CUF introduce additional assembly process on top of high material cost as compared to Moldable Underfill (MUF). In this paper, we explore the use of MUF for the 4-diue stack. MUF is very attractive as it combined the step of molding and underfilling into one single step in addition to the low material cost as compared to CUF. The reliability of MUF is much superior to CUF as shown in the simulation study. The simulation study indicates a drastic 1.65 times more fatigue life for MUF as compared to CUF. The 4 die stack is formed using conventional mass reflow process. The dies is stacked on top of each other on a bottom substrate wafer using conventional noclean flux. The whole substrate wafer with the 4 die stack is then send through a reflow oven to form the solder interconnect for all 4 die stacks. This approach is much prefer than individual thermo-compression process in terms of throughput and less thermal loading to the solder interconnects as no heat is applied to each die stacking process. We had demonstrated no void in the region between the solder bump after the MUF molding process.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
可模压下填料四模堆模的工艺开发
市场总是在寻找降低包装成本的方法。保护易碎微凸点的传统方法是采用毛细管下填充(CUF)来减轻模具和基板之间CTE不匹配的问题。然而,与可塑底填料(MUF)相比,使用CUF在高材料成本的基础上引入了额外的装配过程。在本文中,我们探讨了在4双线程堆栈中使用MUF。MUF非常有吸引力,因为它将成型和下填充步骤结合为一个步骤,而且与CUF相比材料成本低。仿真研究表明,MUF的可靠性大大优于CUF。仿真研究表明,MUF的疲劳寿命是CUF的1.65倍。采用常规的质量回流工艺形成四模堆。这些晶片是用传统的核电通量在衬底晶片上堆叠在一起的。然后将具有4个芯片堆的整个基板晶圆通过回流炉,形成所有4个芯片堆的焊料互连。就吞吐量而言,这种方法比单独的热压缩工艺要好得多,并且焊料互连的热负荷更少,因为每个模具堆叠过程都没有施加热量。我们已经证明了在MUF成型过程后,焊料凸起之间的区域没有空洞。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Development of Novel Fine Line 2.1 D Package with Organic Interposer Using Advanced Substrate-Based Process A Novel Finite Element Technique for Moisture Diffusion Modeling Using ANSYS Mechanical Modelling of High Power Lateral IGBT for LED Driver Applications Physical Aging of Epoxy Molding Compound and Its Influences on the Warpage of Reconstituted Wafer Controlling Die Warpage by Applying Under Bump Metallurgy for Fan-Out Package Process Applications
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1