A. Ionescu, V. Pott, R. Fritschi, K. Banerjee, M. Declercq, P. Renaud, C. Hibert, P. Fluckiger, G. Racine
{"title":"Modeling and design of a low-voltage SOI suspended-gate MOSFET (SG-MOSFET) with a metal-over-gate architecture","authors":"A. Ionescu, V. Pott, R. Fritschi, K. Banerjee, M. Declercq, P. Renaud, C. Hibert, P. Fluckiger, G. Racine","doi":"10.1109/ISQED.2002.996794","DOIUrl":null,"url":null,"abstract":"A novel MEMS device architecture: the SOI SG-MOSFET, which combines a solid-state MOS transistor and a suspended metal membrane in a unique metal-over-gate architecture, is proposed. A unified physical analytical model (weak, moderate and strong inversions) is developed and used to investigate main electrostatic characteristics in order to provide first-order design criteria for low-voltage operation and high-performance. It is demonstrated that the use of a thin gate oxide (<20 nm) is essential for a high C/sub on//C/sub off/ ratio (>100) and a low spring constant (<100 N/m) is needed for low voltage (<5 V) actuation. An adapted fabrication process is reported.","PeriodicalId":20510,"journal":{"name":"Proceedings International Symposium on Quality Electronic Design","volume":"60 1","pages":"496-501"},"PeriodicalIF":0.0000,"publicationDate":"2002-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"81","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.996794","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 81
Abstract
A novel MEMS device architecture: the SOI SG-MOSFET, which combines a solid-state MOS transistor and a suspended metal membrane in a unique metal-over-gate architecture, is proposed. A unified physical analytical model (weak, moderate and strong inversions) is developed and used to investigate main electrostatic characteristics in order to provide first-order design criteria for low-voltage operation and high-performance. It is demonstrated that the use of a thin gate oxide (<20 nm) is essential for a high C/sub on//C/sub off/ ratio (>100) and a low spring constant (<100 N/m) is needed for low voltage (<5 V) actuation. An adapted fabrication process is reported.