E. Morinaga, Y. Oka, H. Nishimori, H. Miyagawa, R. Satoh, Y. Iwata, R. Kanezaki
{"title":"Study of low temperature and high heat-resistant fluxless bonding via nanoscale thin film control toward wafer-level multiple chip stacking for 3D LSI","authors":"E. Morinaga, Y. Oka, H. Nishimori, H. Miyagawa, R. Satoh, Y. Iwata, R. Kanezaki","doi":"10.1109/ECTC.2012.6248799","DOIUrl":null,"url":null,"abstract":"The three dimensional system in package (3D-SiP) has been regarded as a promising solution to the scaling limit problem in the semiconductor industry. Practical realization of the 3D-SiP needs establishing a standard bonding technology for chip stacking. This research focuses on a low temperature and high heat-resistant fluxless bonding method, which can overcome the bump height variation problem in a chip/wafer, using high-boiling alcohol, an indium-tin (InSn) thin film and its transformation into high-melting intermetallic compound (IMC). Experimental studies showed high-rate deposition of InSn alloy and successive deposition of silver achieve successful bonding where the joint has high melting point (higher than 673K).","PeriodicalId":6384,"journal":{"name":"2012 IEEE 62nd Electronic Components and Technology Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2012-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 62nd Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2012.6248799","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The three dimensional system in package (3D-SiP) has been regarded as a promising solution to the scaling limit problem in the semiconductor industry. Practical realization of the 3D-SiP needs establishing a standard bonding technology for chip stacking. This research focuses on a low temperature and high heat-resistant fluxless bonding method, which can overcome the bump height variation problem in a chip/wafer, using high-boiling alcohol, an indium-tin (InSn) thin film and its transformation into high-melting intermetallic compound (IMC). Experimental studies showed high-rate deposition of InSn alloy and successive deposition of silver achieve successful bonding where the joint has high melting point (higher than 673K).
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