Behavioral IP specification and integration framework for high-level design reuse

Abstract

Specifying virtual components at the behavioral level appears as the most promising solution to achieve a real efficiency of design reuse. In this paper we propose a methodology to specify and use Behavioral Level IP (BL-IP). Thus, IP designer tasks are easier due to the unified representation offered by this level of abstraction. The genericity of a behavioral IP permits efficient optimizations and make application context adaptations a reality We propose a unified framework to define an IP at the behavioral level and to tune a particular block according to designer needs. Therefore, we define the IP generator tool and the Universal High Level Synthesis concept.