Open-Source Crypto IP Cores for FPGAs – Overview and Evaluation

M. Billmann, S. Werner, Roland Holler, Friedrich Praus, Andreas Puhm, N. Kero
{"title":"Open-Source Crypto IP Cores for FPGAs – Overview and Evaluation","authors":"M. Billmann, S. Werner, Roland Holler, Friedrich Praus, Andreas Puhm, N. Kero","doi":"10.1109/Austrochip.2019.00020","DOIUrl":null,"url":null,"abstract":"With the increasing number of electronic based systems being connected to the Internet via wired or wireless connections in the era of the IoT, the importance of security aspects is well recognized. At the same time growth of available complexity and increasing market share of reconfigurable integrated circuits make integration of whole digital systems feasible at relatively low cost. Placing security functions into reconfigurable logic might be advantageous in case of algorithm changes, bug fixes, or updates for hardening of the core against attacks. In this paper we thus want to give an overview of available open-source hardware security building blocks for basic cryptographic functions and show evaluation results of selected cores in FPGA technology.","PeriodicalId":6724,"journal":{"name":"2019 Austrochip Workshop on Microelectronics (Austrochip)","volume":"106 1","pages":"47-54"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 Austrochip Workshop on Microelectronics (Austrochip)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/Austrochip.2019.00020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

With the increasing number of electronic based systems being connected to the Internet via wired or wireless connections in the era of the IoT, the importance of security aspects is well recognized. At the same time growth of available complexity and increasing market share of reconfigurable integrated circuits make integration of whole digital systems feasible at relatively low cost. Placing security functions into reconfigurable logic might be advantageous in case of algorithm changes, bug fixes, or updates for hardening of the core against attacks. In this paper we thus want to give an overview of available open-source hardware security building blocks for basic cryptographic functions and show evaluation results of selected cores in FPGA technology.
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fpga的开源加密IP核-概述和评估
在物联网时代,随着越来越多的电子系统通过有线或无线连接连接到互联网,安全方面的重要性得到了充分认识。同时,可重构集成电路可用复杂性的增长和市场份额的增加使得以相对较低的成本集成整个数字系统成为可能。将安全功能放入可重新配置的逻辑中可能有利于算法更改、错误修复或更新,以加强核心抵御攻击。因此,在本文中,我们希望概述用于基本加密功能的可用开源硬件安全构建块,并展示FPGA技术中选定核心的评估结果。
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