Robust TiN HM process to overcome under etch issue for SAV scheme on 14nm node

Abstract

For advance node such as 14nm technology and beyond, back end of line interconnect has implemented self-aligned via (SAV) schemes for better via-metal short process window [1]. A TiN metal hard mask (MHM) is used for the trench pattern definition, after which via lithography and partial via (PV) etch is performed where the TiN was opened. The via etch condition has very good selectivity so that via is formed in a self-aligned fashion by TiN HM [2]. It is indeed to have significant benefit of via to metal short [3]. However, one of the trade off in SAV scheme is the via under etch that whether or not via can well land on an opened oxide area during PV etch. To define the contact area between via resist hole and opened HM oxide as an effective area for via to open successfully. “Fig. 1” shows the effective area change during process variation due to Via alignment, Via photo resist CD variation (Via ADICD) and post hard mask etch CD variation (AMICD). “Fig. 2” shows the mechanism of this under etch failure mode and typical TEM image from 64nm metal pitch test vehicle. In this work, we try to enlarge the process window by an aggressive AMICD targeting in combining with a higher density TiN material to maintain profile.