Montgomery Modular Multiplication Algorithm on Multi-Core Systems

Junfeng Fan, K. Sakiyama, I. Verbauwhede
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引用次数: 37

Abstract

In this paper, we investigate the efficient software implementations of theMontgomery modular multiplication algorithm on amulti-core system. AHW/SW co-design technique is used to find the efficient system architecture and the instruction scheduling method. We first implement the Montgomery modular multiplication on a multi-core systemwith general purpose cores. We then speed up it by adopting the Multiply-Accumulate (MAC) operation in each core. As a result, the performance can be improved by a factor of 1.53 and 2.15 when 256-bit and 1024-bit Montgomery modular multiplication being performed, respectively.
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多核系统上的Montgomery模乘法算法
本文研究了montgomery模乘法算法在多核系统上的高效软件实现。采用AHW/SW协同设计技术寻找高效的系统架构和指令调度方法。我们首先在具有通用内核的多核系统上实现Montgomery模乘法。然后,我们通过在每个内核中采用乘法累加(MAC)操作来加速它。因此,当执行256位和1024位Montgomery模乘法时,性能可以分别提高1.53和2.15倍。
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