BipBip: A Low-Latency Tweakable Block Cipher with Small Dimensions

Yanis Belkheyar, J. Daemen, Christoph Dobraunig, Santosh K. Ghosh, Shahram Rasoolzadeh
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引用次数: 5

Abstract

Recently, a memory safety concept called Cryptographic Capability Computing (C3) has been proposed. C3 is the first memory safety mechanism that works without requiring extra storage for metadata and hence, has the potential to significantly enhance the security of modern IT-systems at a rather low cost. To achieve this, C3 heavily relies on ultra-low-latency cryptographic primitives. However, the most crucial primitive required by C3 demands uncommon dimensions. To partially encrypt 64-bit pointers, a 24-bit tweakable block cipher with a 40-bit tweak is needed. The research on low-latency tweakable block ciphers with such small dimensions is not very mature. Therefore, designing such a cipher provides a great research challenge, which we take on with this paper. As a result, we present BipBip, a 24-bit tweakable block cipher with a 40-bit tweak that allows for ASIC implementations with a latency of 3 cycles at a 4.5 GHz clock frequency on a modern 10 nm CMOS technology.
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BipBip:一个具有小尺寸的低延迟可调分组密码
最近,人们提出了一种名为加密能力计算(Cryptographic Capability Computing, C3)的内存安全概念。C3是第一种不需要额外存储元数据的内存安全机制,因此它有可能以相当低的成本显著增强现代it系统的安全性。为了实现这一点,C3在很大程度上依赖于超低延迟的加密原语。然而,C3所要求的最关键的原语要求不常见的尺寸。要对64位指针进行部分加密,需要一个具有40位调整的24位可调整块密码。对于如此小尺寸的低延迟可调分组密码的研究还不是很成熟。因此,设计这样的密码提供了一个巨大的研究挑战,我们在本文中进行了研究。因此,我们提出了BipBip,这是一种24位可调整的分组密码,具有40位调整,允许在现代10纳米CMOS技术上以4.5 GHz时钟频率实现延迟为3个周期的ASIC。
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