Michal Silbermintz, Amir Sahar, Itay Peled, M. Anschel, Emil Watralov, H. Miller, E. Weisberger
{"title":"SOC modeling methodology for architectural exploration and software development","authors":"Michal Silbermintz, Amir Sahar, Itay Peled, M. Anschel, Emil Watralov, H. Miller, E. Weisberger","doi":"10.1109/ICECS.2004.1399698","DOIUrl":null,"url":null,"abstract":"The paper introduces a system-on-chip (SOC) modeling methodology that enables the use of a single model for multiple purposes throughout a project's life cycle, starting from the architectural definition phase, continuing with the microarchitectural optimization and ending with the software development and optimization phase. These different purposes are served by enabling multiple approaches for modeling applications, providing capabilities for configuring and refining the hardware model and reaching a high accuracy level while maintaining a good simulation speed.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Giornale di Storia Costituzionale","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2004.1399698","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Arts and Humanities","Score":null,"Total":0}
引用次数: 5
Abstract
The paper introduces a system-on-chip (SOC) modeling methodology that enables the use of a single model for multiple purposes throughout a project's life cycle, starting from the architectural definition phase, continuing with the microarchitectural optimization and ending with the software development and optimization phase. These different purposes are served by enabling multiple approaches for modeling applications, providing capabilities for configuring and refining the hardware model and reaching a high accuracy level while maintaining a good simulation speed.