{"title":"A Simulated Study of 65 nm CMOS 2GHz Front-End Preamplifier Circuit for Optical Fiber Applications","authors":"Ruwaida Al-Berwari, Muhammed Hameed Alsheikhjader","doi":"10.33899/rjs.2022.175390","DOIUrl":null,"url":null,"abstract":"In this research a new design of the transimpedance amplifier (TIA) with the current mirror was employed by the technique (65nm). The TIA consists of a common gate transistor amplifier (CG TIA) and a common source amplifier as an input stage with local active feedback with a second stage of a current mirror and local active feedback to increase gain. In order to verify the performance of the proposed TIA, a circuit simulation was carried out in the LT spice program using coefficients with the technique (65nm CMOS). The simulation results indicate that the interfacial impedance gain is (41 dBΩ) at a bandwidth frequency of (2.0 GHz-3dB) for an input capacitor of (100 fF) and an input referred noise current spectral density of (14 pA/√Hz) and a power consumption value of (0.091 mw) at an applied voltage (1V). The main focus of this research is low consumption of power and voltage compared to another research.","PeriodicalId":20803,"journal":{"name":"Rafidain journal of science","volume":"17 1","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2022-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Rafidain journal of science","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.33899/rjs.2022.175390","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this research a new design of the transimpedance amplifier (TIA) with the current mirror was employed by the technique (65nm). The TIA consists of a common gate transistor amplifier (CG TIA) and a common source amplifier as an input stage with local active feedback with a second stage of a current mirror and local active feedback to increase gain. In order to verify the performance of the proposed TIA, a circuit simulation was carried out in the LT spice program using coefficients with the technique (65nm CMOS). The simulation results indicate that the interfacial impedance gain is (41 dBΩ) at a bandwidth frequency of (2.0 GHz-3dB) for an input capacitor of (100 fF) and an input referred noise current spectral density of (14 pA/√Hz) and a power consumption value of (0.091 mw) at an applied voltage (1V). The main focus of this research is low consumption of power and voltage compared to another research.