A 18-27 GHz Programmable Gain Amplifier in 65-nm CMOS technology

IF 3.1 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2022-10-03 DOI:10.1109/VLSI-SoC54400.2022.9939645

C. D. R. Bueno, U. E. Eraso, C. Sánchez-Azqueta, S. Celma

引用次数: 1

Abstract

In this paper the potential of CMOS technology will be applied to the design of a new programmable gain amplifier (PGA), for its use in a phase shifter for an array antenna receiver operating over the 18-27 GHz frequency range. The main blocks that will provide the required phase shift are a quadrature signal generator (QSG) followed by a programable gain amplifier (PGA). In addition, the next stage to the phase shifter, consisting of a power combiner, will be added to the design to achieve a better reproduction of the output signal behavior. The PGA topology uses dummy transistors to keep constant the input and output impedances. The phase shifter is digitally programmable using a 4-bit word. The root mean square error at 24 GHz is 3.5º for the phase and 0.76 dB for the gain.

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基于65nm CMOS技术的18- 27ghz可编程增益放大器

在本文中，CMOS技术的潜力将应用于设计一种新的可编程增益放大器(PGA)，用于在18- 27ghz频率范围内工作的阵列天线接收器的移相器。提供所需相移的主要模块是一个正交信号发生器(QSG)，然后是一个可编程增益放大器(PGA)。此外，下一级移相器，由一个功率合成器组成，将被添加到设计中，以实现输出信号行为的更好再现。PGA拓扑使用假晶体管来保持输入和输出阻抗恒定。移相器使用4位字进行数字编程。在24 GHz时，相位均方根误差为3.5º，增益为0.76 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.