{"title":"Low-power and high-speed V VLSI design with low supply voltage through cooperation between levels","authors":"T. Sakurai","doi":"10.1109/ISQED.2002.996786","DOIUrl":null,"url":null,"abstract":"In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, V/sub DD/-hopping and V/sub TH/-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.","PeriodicalId":20510,"journal":{"name":"Proceedings International Symposium on Quality Electronic Design","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.996786","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, V/sub DD/-hopping and V/sub TH/-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.