T. Yoshida, H. Takato, T. Sakurai, K. Kokubun, K. Hiyama, A. Nomachi, Y. Takasu, M. Kishida, H. Ohtsuka, H. Naruse, Y. Morimasa, N. Yanagiya, T. Hashimoto, T. Noguchi, T. Miyamae, N. Iwabuchi, M. Tanaka, J. Kumagai, H. Ishiuchi
{"title":"A fabrication method for high performance embedded DRAM of 0.18 /spl mu/m generation and beyond","authors":"T. Yoshida, H. Takato, T. Sakurai, K. Kokubun, K. Hiyama, A. Nomachi, Y. Takasu, M. Kishida, H. Ohtsuka, H. Naruse, Y. Morimasa, N. Yanagiya, T. Hashimoto, T. Noguchi, T. Miyamae, N. Iwabuchi, M. Tanaka, J. Kumagai, H. Ishiuchi","doi":"10.1109/CICC.2000.852618","DOIUrl":null,"url":null,"abstract":"A new fabrication method for embedded DRAM of 0.18 /spl mu/m generation is proposed, which realizes full compatibility with logic process such as Co salicide, dual work function gate, small thermal budget and metalization, and introduces Self-aligned Salicide Block (SSB), a new process technology. Fabricated embedded DRAM shows excellent characteristics with respect to both retention time and MOSFET AC/DC performance, promising high performance of SOC (System On a Chip) applications.","PeriodicalId":20702,"journal":{"name":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","volume":"11 1","pages":"61-64"},"PeriodicalIF":0.0000,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2000.852618","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
A new fabrication method for embedded DRAM of 0.18 /spl mu/m generation is proposed, which realizes full compatibility with logic process such as Co salicide, dual work function gate, small thermal budget and metalization, and introduces Self-aligned Salicide Block (SSB), a new process technology. Fabricated embedded DRAM shows excellent characteristics with respect to both retention time and MOSFET AC/DC performance, promising high performance of SOC (System On a Chip) applications.
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