Exploiting locality for low-power design

Abstract

We propose a new high-level synthesis technique for the low-power implementation of real-time applications. The technique uses algorithm partitioning to preserve locality in the assignment of operations to hardware units. This results in reduced usage of long high-capacitance buses, fewer accesses to multiplexers and buffers, and more compact layouts. Experimental results show average reductions in bus and multiplexer power of 62.9% and 38.5%, respectively, resulting in an average reduction of 18.5% in total power.