Pan Yang, Pan Dong, Zhe Jiang, Jintao Xia, Yan Ding
{"title":"Work-in-Progress: a static partition for shared cache in mixed-time-sensitive system with balanced performance","authors":"Pan Yang, Pan Dong, Zhe Jiang, Jintao Xia, Yan Ding","doi":"10.1109/RTCSA52859.2021.00035","DOIUrl":null,"url":null,"abstract":"In modern safety-critical embedded systems (e.g., automotive/avionic systems), it is increasingly important to integrate components with different critical levels into one physical platform considering space, weight, and heat generation. The most common case is a mixed-time-sensitive system (MTSS), which is usually composed of an RTOS (Real-Time Operating System) and a GPOS (General-Purpose Operating System). In MTSS, cache sharing between RTOS and GPOS often causes inter-task interference, making WCET estimation overly pessimistic due to the increase of cache miss rate and task execution time variances. The existing cache management solutions, such as dynamic and static schemes, are challenging to be applied to MTSS. In this paper, we propose a novel practical method, termed cacheSPM, to eliminate the cache interference in MTSS. CacheSPM statically partitions cache resources during the compilation phase, effectively preventing the GPOS from influencing the cache resources belonged to the RTOS. Compared to the traditional partition schemes, cacheSPM has no intervention of memory manager and additional runtime overhead. Evaluation reveals that this method improves the memory utilization and reduces overhead in a balanced way, with the memory access latency reduced by 80.7% on average, and guarantees the real-time capability of RTOS without negatively affecting the performance of GPOS.","PeriodicalId":38446,"journal":{"name":"International Journal of Embedded and Real-Time Communication Systems (IJERTCS)","volume":"12 1","pages":"210-212"},"PeriodicalIF":0.5000,"publicationDate":"2021-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Journal of Embedded and Real-Time Communication Systems (IJERTCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTCSA52859.2021.00035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, SOFTWARE ENGINEERING","Score":null,"Total":0}
引用次数: 0
Abstract
In modern safety-critical embedded systems (e.g., automotive/avionic systems), it is increasingly important to integrate components with different critical levels into one physical platform considering space, weight, and heat generation. The most common case is a mixed-time-sensitive system (MTSS), which is usually composed of an RTOS (Real-Time Operating System) and a GPOS (General-Purpose Operating System). In MTSS, cache sharing between RTOS and GPOS often causes inter-task interference, making WCET estimation overly pessimistic due to the increase of cache miss rate and task execution time variances. The existing cache management solutions, such as dynamic and static schemes, are challenging to be applied to MTSS. In this paper, we propose a novel practical method, termed cacheSPM, to eliminate the cache interference in MTSS. CacheSPM statically partitions cache resources during the compilation phase, effectively preventing the GPOS from influencing the cache resources belonged to the RTOS. Compared to the traditional partition schemes, cacheSPM has no intervention of memory manager and additional runtime overhead. Evaluation reveals that this method improves the memory utilization and reduces overhead in a balanced way, with the memory access latency reduced by 80.7% on average, and guarantees the real-time capability of RTOS without negatively affecting the performance of GPOS.