Demonstration of TCNCP flip chip reliability with 30μm pitch Cu bump and substrate with thin Ni and thick Au surface finish

Abstract

Recently, TCNCP (Thermal Compression with Non-Conductive Paste) flip chip technology has been adopted for various devices because of high demand for large bump density. Fine pitch micro Cu bumps are usually connected to trace on the substrate (Bump on Trace, BOT) due to space limitation on substrate. In this study, TCNCP technology was used to attach die onto substrate trace with surface finish of thin Ni (0.1um) and thick Au (0.4um). The micro Cu bump used in the device under test has a dome shaped Sn-based solder cap of 13um in height. The ratio of Au layer plated on the substrate trace to Sn cap on the Cu bump is about 10 wt%, which is far beyond threshold value of 3 wt% for Au embrittlement. However, it was proved that the micro joint obtained with TCNCP can pass TCT 1000 cycles, HTS 1000hours and uHAST 192hrs without failure. SEM/EDX study on HTS samples (0hr, 500hr, 1000hr) showed that the joints had a large amount of IMC formed mainly consisting of (CuxAu1-x)6Sn5 phase after reflow and independent Cu3Sn phase formed near to die bump at a later stage during HTS test. Although AuSn4 was present in 0hr sample, it disappeared later. No Ni was detected. Phase segregation appeared near to die bump when HTS time went up to 1000hrs. No crack and void were found at that point.