{"title":"Using all signed-digit representations to design single integer multipliers using subexpression elimination","authors":"A. Dempster, M. Macleod","doi":"10.1109/ISCAS.2004.1328709","DOIUrl":null,"url":null,"abstract":"A new algorithm is introduced for design of integer multipliers using subexpression elimination. Hartley's algorithm for subexpression elimination is applied to all possible signed-digit representations of the integer. Results are within 1% of the slow optimal exhaustive searches for 19-bit integers.","PeriodicalId":6445,"journal":{"name":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","volume":"44 1","pages":"III-165"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"45","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2004.1328709","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 45
Abstract
A new algorithm is introduced for design of integer multipliers using subexpression elimination. Hartley's algorithm for subexpression elimination is applied to all possible signed-digit representations of the integer. Results are within 1% of the slow optimal exhaustive searches for 19-bit integers.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
