An efficient reference-based adaptive antenna impedance matching CMOS circuit

A. Robichaud, F. Nabki, D. Deslandes
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引用次数: 2

Abstract

This paper presents a simple integrated reference based adaptive matching network capable of undertaking real time antenna tuning for applications such as wearable wireless sensors. The signal sent to the antenna is compared to a reference signal using a single flip-flop acting as a phase detector. In case of an impedance mismatch, a counter controlling a capacitor bank is activated reducing the sensed mismatch. The system is capable of three modes: calibration, matching and operation. The calibration mode ensures that the reference signal is in phase with the signal sent to the antenna when the impedance of the antenna is 50 Ω. In matching mode, the capacitor bank is adjusted to maintain antenna matching. In operation mode, the circuit is shut off allowing for low power consumption (85 nW while matching every 1 ms). The circuit is able to provide a VSWR < 2 over a wide range of antenna impedance levels. It is designed in CMOS 0.13 μm technology.
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一种高效的基于参考的自适应天线阻抗匹配CMOS电路
本文提出了一种简单的基于集成参考的自适应匹配网络,能够对可穿戴无线传感器等应用进行实时天线调谐。发送到天线的信号与参考信号进行比较,使用单个触发器作为鉴相器。在阻抗失配的情况下,控制电容器组的计数器被激活,减少感测到的失配。该系统具有校准、匹配和运行三种模式。校准模式确保在天线阻抗为50时,参考信号与发送到天线的信号同相Ω。在匹配模式下,调整电容器组以保持天线匹配。在工作模式下,电路关闭,允许低功耗(85 nW,同时匹配每1毫秒)。该电路能够在很宽的天线阻抗水平范围内提供< 2的VSWR。采用CMOS 0.13 μm工艺设计。
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