A 4.78mm2 fully-integrated neuromodulation SoC combining 64 acquisition channels with digital compression and simultaneous dual stimulation

D. Yeager, W. Biederman, Nathan Narevsky, Jaclyn Leverett, R. Neely, J. Carmena, E. Alon, J. Rabaey
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引用次数: 11

Abstract

A 65nm CMOS 4.78mm 2 integrated neuromodulation SoC consumes 417μW from a 1.2V supply while operating 64 acquisition channels with epoch compression at an average firing rate of 50Hz and engaging two stimulators with a pulse width of 250μs/phase, differential current of 150μA, and a pulse frequency of 100Hz. Compared to the state of the art, this represents the lowest area and power for the highest integration complexity achieved to date.
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一个4.78mm2的全集成神经调节SoC,结合64个采集通道,数字压缩和同步双重刺激
一种65nm CMOS 4.78mm 2集成神经调节SoC在1.2V电源下消耗417μW,同时在平均发射速率为50Hz的条件下工作64个采集通道,使用两个脉冲宽度为250μs/相、差分电流为150μA、脉冲频率为100Hz的刺激器。与目前的技术水平相比,这代表了迄今为止实现的最高集成复杂性的最低面积和功率。
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