Profiling a warehouse-scale computer

Svilen Kanev, Juan Pablo Darago, K. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, D. Brooks
{"title":"Profiling a warehouse-scale computer","authors":"Svilen Kanev, Juan Pablo Darago, K. Hazelwood, Parthasarathy Ranganathan, Tipp Moseley, Gu-Yeon Wei, D. Brooks","doi":"10.1145/2749469.2750392","DOIUrl":null,"url":null,"abstract":"With the increasing prevalence of warehouse-scale (WSC) and cloud computing, understanding the interactions of server applications with the underlying microarchitecture becomes ever more important in order to extract maximum performance out of server hardware. To aid such understanding, this paper presents a detailed microarchitectural analysis of live datacenter jobs, measured on more than 20,000 Google machines over a three year period, and comprising thousands of different applications. We first find that WSC workloads are extremely diverse, breeding the need for architectures that can tolerate application variability without performance loss. However, some patterns emerge, offering opportunities for co-optimization of hardware and software. For example, we identify common building blocks in the lower levels of the software stack. This “datacenter tax” can comprise nearly 30% of cycles across jobs running in the fleet, which makes its constituents prime candidates for hardware specialization in future server systems-on-chips. We also uncover opportunities for classic microarchitectural optimizations for server processors, especially in the cache hierarchy. Typical workloads place significant stress on instruction caches and prefer memory latency over bandwidth. They also stall cores often, but compute heavily in bursts. These observations motivate several interesting directions for future warehouse-scale computers.","PeriodicalId":6878,"journal":{"name":"2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA)","volume":"14 6 1","pages":"158-169"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"346","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 ACM/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2749469.2750392","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 346

Abstract

With the increasing prevalence of warehouse-scale (WSC) and cloud computing, understanding the interactions of server applications with the underlying microarchitecture becomes ever more important in order to extract maximum performance out of server hardware. To aid such understanding, this paper presents a detailed microarchitectural analysis of live datacenter jobs, measured on more than 20,000 Google machines over a three year period, and comprising thousands of different applications. We first find that WSC workloads are extremely diverse, breeding the need for architectures that can tolerate application variability without performance loss. However, some patterns emerge, offering opportunities for co-optimization of hardware and software. For example, we identify common building blocks in the lower levels of the software stack. This “datacenter tax” can comprise nearly 30% of cycles across jobs running in the fleet, which makes its constituents prime candidates for hardware specialization in future server systems-on-chips. We also uncover opportunities for classic microarchitectural optimizations for server processors, especially in the cache hierarchy. Typical workloads place significant stress on instruction caches and prefer memory latency over bandwidth. They also stall cores often, but compute heavily in bursts. These observations motivate several interesting directions for future warehouse-scale computers.
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分析仓库级计算机
随着仓库规模(WSC)和云计算的日益普及,理解服务器应用程序与底层微体系结构的交互变得越来越重要,以便从服务器硬件中提取最大性能。为了帮助理解这种理解,本文对实时数据中心作业进行了详细的微架构分析,在三年的时间里对超过20,000台Google机器进行了测量,包括数千种不同的应用程序。首先,我们发现WSC工作负载非常多样化,因此需要能够容忍应用程序可变性而不损失性能的架构。然而,出现了一些模式,为硬件和软件的协同优化提供了机会。例如,我们在软件堆栈的较低层次中识别公共构建块。这种“数据中心税”可以占到整个舰队中运行作业周期的近30%,这使得它的组成部分成为未来服务器芯片系统硬件专业化的主要候选者。我们还发现了对服务器处理器进行经典微体系结构优化的机会,特别是在缓存层次结构中。典型的工作负载对指令缓存有很大的压力,并且更喜欢内存延迟而不是带宽。它们也经常使核心停滞,但在突发情况下进行大量计算。这些观察结果激发了未来仓库级计算机的几个有趣方向。
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