W. Lai, Jhe-Wei Jhuang, S. Jang, Guan-Yu Lin, C. Hsue
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引用次数: 2
Abstract
This letter proposes a dual-resonance CMOS LC-tank injection locked frequency doubler (ILFD) fabricated in the 0.18 μm CMOS process and describes the circuit design, operation principle and measurement results of the ILFD. The ILFD circuit is composed of a RLC dual-resonance first-harmonic injection-locked oscillator (ILO), a wide-band frequency doubler with differential-injection ports. The ILFD uses resistors to degrade the resonator quality factor and enhance the locking range. At the supply voltage of 1.65 V, the dc power consumption is 7.71 mW. At the incident power of 0 dBm, the ILFD has locking range from the incident frequency 3.9 GHz to 8.2 GHz.
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