S. Levantino, A. Bonfanti, L. Romanò, C. Samori, A. Lacaita
{"title":"Differential tuning oscillators with reduced flicker noise upconversion","authors":"S. Levantino, A. Bonfanti, L. Romanò, C. Samori, A. Lacaita","doi":"10.1109/ICECS.2004.1399607","DOIUrl":null,"url":null,"abstract":"The adoption of differential tuning in oscillators provides cancellation of common-mode disturbances, and thus, it is expected to lower phase noise and power supply pulling. However, the direct application of differential tuning increases the capacitor nonlinearity, and in turn, it can raise the flicker-induced phase noise. This upconversion mechanism, based on non-linearities, is quantitatively assessed and a modified configuration circumventing this phenomenon is proposed and applied to the design of a 1.8-GHz LC oscillator in 0.35-/spl mu/m CMOS technology. The simulated 1/f/sup 3/, phase noise is reduced by 20 dB, without impairing the tuning range and supply pulling.","PeriodicalId":38467,"journal":{"name":"Giornale di Storia Costituzionale","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-12-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Giornale di Storia Costituzionale","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2004.1399607","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Arts and Humanities","Score":null,"Total":0}
引用次数: 1
Abstract
The adoption of differential tuning in oscillators provides cancellation of common-mode disturbances, and thus, it is expected to lower phase noise and power supply pulling. However, the direct application of differential tuning increases the capacitor nonlinearity, and in turn, it can raise the flicker-induced phase noise. This upconversion mechanism, based on non-linearities, is quantitatively assessed and a modified configuration circumventing this phenomenon is proposed and applied to the design of a 1.8-GHz LC oscillator in 0.35-/spl mu/m CMOS technology. The simulated 1/f/sup 3/, phase noise is reduced by 20 dB, without impairing the tuning range and supply pulling.