{"title":"Yolov3-tiny Object Detection SoC Based on FPGA Platform","authors":"Hongbo Zhang, Jiaqi Jiang, Yunhao Fu, Yuchun Chang","doi":"10.1109/ICICM54364.2021.9660358","DOIUrl":null,"url":null,"abstract":"Object detection is a popular direction in computer vision and digital image processing and convolutional neural network have been widely used in this field. In the forward reasoning stage, many practical applications based on embedded platforms have stringent requirements for low latency and low power consumption. FPGA are undoubtedly the optimal solution to deal with such problems. Yolo [1] is one of the high-quality frameworks for object detection. Among them, Yolov3-tiny is a lightweight network that balances accuracy and network complexity. It is also the most popular object detection network in the industry. This article introduces the complete process of mapping the network structure to the FPGA based on the Yolov3tiny algorithm and optimizes the accelerator architecture for Zedboard to make it under limited resources to achieve the best performance. The experimental results show that the detection speed of 325.036ms/img and the performance of 24.32GOPS is obtained on Zedboard and the mAP of COCO is 32.6%. Compared with Xeon E5-2673 v4 CPU, the energy efficiency is 241times and the performance is 8 times; compared with single-core ARM-A9 CPU, its energy efficiency is 180.75 times and its performance is 402.12 times.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"4 1","pages":"291-294"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660358","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Object detection is a popular direction in computer vision and digital image processing and convolutional neural network have been widely used in this field. In the forward reasoning stage, many practical applications based on embedded platforms have stringent requirements for low latency and low power consumption. FPGA are undoubtedly the optimal solution to deal with such problems. Yolo [1] is one of the high-quality frameworks for object detection. Among them, Yolov3-tiny is a lightweight network that balances accuracy and network complexity. It is also the most popular object detection network in the industry. This article introduces the complete process of mapping the network structure to the FPGA based on the Yolov3tiny algorithm and optimizes the accelerator architecture for Zedboard to make it under limited resources to achieve the best performance. The experimental results show that the detection speed of 325.036ms/img and the performance of 24.32GOPS is obtained on Zedboard and the mAP of COCO is 32.6%. Compared with Xeon E5-2673 v4 CPU, the energy efficiency is 241times and the performance is 8 times; compared with single-core ARM-A9 CPU, its energy efficiency is 180.75 times and its performance is 402.12 times.