Impact of high-k dielectric on the digital and analog performance on emulation of double-gate UTBB SOI MOSFETs with different ground plane structures

Abstract

In this work, we investigate the impact of using different gate dielectric materials i.e HfO₂ and Si₃N₄ as compared to the conventional SiO₂ with equivalent oxide thickness (EOT) of 1.2 nm on the digital and analog performance of UTBB SOI MOSFETs of 10 nm gate length with different ground plane (GP) structures under the double-gate (DG) operation-mode by numerical simulations. It is found that Si₃N₄ provides good digital and analog performance in terms of lower DIBL and higher voltage gain, A_v. Meanwhile, GP-A structure which employed p+ doping under the source and drain regions beneath the BOX is able to provide not only high A_v but also a stable gain throughout the frequency range as compared to other GP structures. Thus, the configuration of GP-A structure with Si₃N₄ as the high-k materials is proposed for the design of analog and RF circuits.