Design of a Voltage-Controlled Programmable-Gain Amplifier in 65-nm CMOS Technology

Abstract

A voltage-controlled programmable-gain amplifier (VC-PGA) is designed in this work. The power consumption of the VC-PGA is binary-weighted. In contrast to conventional PGAs, the gain step of the designed PGA can be continuously tuned by a control voltage. To prove the concept, an analog baseband chain is implemented in 65 nm CMOS technology, which consists of a switchable-order filter with the VC-PGA. The measurements show that the frequency responses can be configured as either 5th or 7th order with 16 gain steps. The bandwidth is approximately 50 MHz for all cases and the gain step can be continuously tuned between 0 and 3 dB. The core area is only 0.18 μm2.