Electrical analysis of energy depth of electron trap states in silicon nitride films for charge-trap flash memory application

Kiyoteru Kobayashi, Soichiro Nakagawa
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引用次数: 1

Abstract

The conduction current flowing through silicon nitride-silicon dioxide stacked films under negative gate bias at high temperatures has been analyzed and the electron transport mechanism in the stacked films has been studied. The trap depth for electrons in the silicon nitride film used in this work was estimated to be 1.3 eV, which was deeper as compared to that for holes (~1.0 eV). Next, the trap depths for electrons and holes in silicon nitride films with two different N/Si composition ratios were compared. Both trap states for electrons and holes were deeper in the silicon nitride film with the higher N/Si composition ratio. The analysis of the conduction current through silicon nitride-silicon dioxide stacked films is useful to evaluate the energy depth of trap states for electrons existing in silicon nitride films.
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电荷阱快闪存储器用氮化硅薄膜中电子阱态能量深度的电学分析
分析了高温负栅偏压下氮化硅-二氧化硅叠合膜的传导电流,研究了叠合膜中的电子传递机理。氮化硅薄膜中电子的陷阱深度估计为1.3 eV,比空穴(~1.0 eV)的陷阱深度要深。然后,比较了两种不同N/Si组成比的氮化硅薄膜中电子和空穴的陷阱深度。氮化硅薄膜中电子和空穴的阱态随着氮硅比的增大而加深。分析氮化硅-二氧化硅叠合薄膜的传导电流有助于评价氮化硅薄膜中电子的阱态能量深度。
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