High-performance VLSI architecture for three-dimensional instrumentation based on a new concurrent memory-access scheme

Abstract

A high-performance VLSI architecture for 3-D instrumentation has been proposed based on a new concurrent memory access scheme. The key concept of this architecture is to reduce the number of pixel values to be retrieved and the time required in retrieving pixel values. Accordingly, the time required for the calculation of the mean-absolute difference (MAD) function is reduced and operations that involve memory access are calculated in parallel by a 2-D PE array in the MAD calculation unit (MADU).