A CMOS Band-Pass Low Noise Amplifier with Excellent Gain Flatness for mm-Wave 5G Communications

Han-Woong Choi, Sunkyu Choi, Choul‐Young Kim
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引用次数: 4

Abstract

This paper presents a two-stage 24–32 GHz low-noise amplifier (LNA) with excellent gain flatness for wide bandwidth communication applications. A new band-pass type 2-stage common-source (CS) LNA configuration using the pole-tuning technique that actively exploits the parasitic capacitance of a CMOS device is proposed for bandwidth extension with low in-band gain variation. To demonstrate the feasibility of the proposed circuit configuration, a wideband LNA is implemented using a 65-nm CMOS process. The LNA shows a gain variation of ±0.19 dB in frequency band of 24 to 32 GHz with a peak gain of 18.64 dB and a noise figure of 2.27 dB while consuming 10.0 rnA from a 1V supply. The core circuit occupies an area of 0.23 × 0.43 mm2.
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一种用于毫米波5G通信的CMOS带通低噪声放大器,具有优异的增益平坦度
本文提出了一种具有良好增益平坦度的两级24 - 32ghz低噪声放大器(LNA),用于宽带通信。提出了一种新的带通型2级共源LNA结构,该结构采用极点调谐技术,主动利用CMOS器件的寄生电容,用于低带内增益变化的带宽扩展。为了证明所提出的电路配置的可行性,使用65纳米CMOS工艺实现了宽带LNA。LNA在24 ~ 32 GHz频段的增益变化为±0.19 dB,峰值增益为18.64 dB,噪声系数为2.27 dB,从1V电源消耗10.0 rnA。核心电路的面积为0.23 × 0.43 mm2。
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