O. El-Gharniti, E. Kerhervé, J. Bégueret, P. Jarry
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引用次数: 14
Abstract
We present a compact and scalable model for on-chip transformers fabricated in silicon IC technology. The model is driven from the layout and the process technology specifications. It is suitable for design optimization and circuit simulation. EM-simulation is used to validate the model. The proposed model shows excellent agreement with EM-simulation over a large frequency range (1-15 GHz).
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