{"title":"Low-power counter for column-parallel CMOS image sensors","authors":"Jong-Seok Kim, Jin-O. Yoon, B. Choi","doi":"10.1109/APCCAS.2016.7804028","DOIUrl":null,"url":null,"abstract":"A low-power counter (LPC) for column-parallel CMOS image sensors (CISs) is presented. The proposed LPCs can reduce the number of switching events of D-flip-flop (DFF) in the counter by 50% compared to the traditional counter. The simulation results with 200 MHz of clock signal show that the power consumption of the traditional counter is 55.7 μW, and the proposed LPC is 27.9 μW.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"135 1","pages":"554-556"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7804028","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A low-power counter (LPC) for column-parallel CMOS image sensors (CISs) is presented. The proposed LPCs can reduce the number of switching events of D-flip-flop (DFF) in the counter by 50% compared to the traditional counter. The simulation results with 200 MHz of clock signal show that the power consumption of the traditional counter is 55.7 μW, and the proposed LPC is 27.9 μW.
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