{"title":"Fully coherent shaped offset QPSK demodulator architecture with superior hardware efficiency","authors":"D. Rieth, C. Heller, G. Ascheid","doi":"10.1109/APCCAS.2016.7803924","DOIUrl":null,"url":null,"abstract":"Shaped Offset QPSK (SOQPSK) is a highly bandwidth-efficient constant envelope waveform. In order to increase hardware and energy efficiency, a new architecture for fully coherent SOQPSK demodulation is proposed that is suitable for continuous and burst mode transmission. It contains Decision-Directed (DD) synchronization loops for frequency, phase and timing offsets and a low complex method combining robust Start of Frame (SoF) detection with Phase Ambiguity Resolution (PAR) based on nested Barker codes. A coarse grained pipeline structure aims for minimal clock speeds and energy consumption while keeping the overall throughput high. Large complexity reductions are achieved by a multiplier-free Matched Filter (MF) design. Computer simulations and Field Programmable Gate Array (FPGA) implementation results show that the complexity-accuracy trade-offs have been reasonably chosen in terms of close-to-optimal Bit Error Rate (BER) performance and that hardware efficiency gains of more than 90 % compared with implementations from literature are achievable.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803924","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Shaped Offset QPSK (SOQPSK) is a highly bandwidth-efficient constant envelope waveform. In order to increase hardware and energy efficiency, a new architecture for fully coherent SOQPSK demodulation is proposed that is suitable for continuous and burst mode transmission. It contains Decision-Directed (DD) synchronization loops for frequency, phase and timing offsets and a low complex method combining robust Start of Frame (SoF) detection with Phase Ambiguity Resolution (PAR) based on nested Barker codes. A coarse grained pipeline structure aims for minimal clock speeds and energy consumption while keeping the overall throughput high. Large complexity reductions are achieved by a multiplier-free Matched Filter (MF) design. Computer simulations and Field Programmable Gate Array (FPGA) implementation results show that the complexity-accuracy trade-offs have been reasonably chosen in terms of close-to-optimal Bit Error Rate (BER) performance and that hardware efficiency gains of more than 90 % compared with implementations from literature are achievable.