{"title":"Size scaling of printed microstructures using a lift-off printing (LoP) process","authors":"Yu-Min Fu, Y. Liang, Y. T. Cheng, Pu-Wei Wu","doi":"10.1109/NEMS.2014.6908865","DOIUrl":null,"url":null,"abstract":"Inkjet printing has been one of fascinating techniques for microfabrication owing to the characteristics of low manufacturing cost, low processing temperature, low material usage,...etc. [1, 2]. In this work, a Lift-off Printing (LoP) process combining conventional photolithography and inkjet printing processes is introduced to realize printed size-scalable silver microstructures with the line width of 5 up to 70 μm and the resistivity of ~5.7 μΩ · cm on a silicon substrate. In addition, an as-printed interdigitated capacitor with the electrode size and spacing of 10μm has been successfully demonstrated with a capacitance of 2.3 pF/mm2@10kHz.","PeriodicalId":22566,"journal":{"name":"The 9th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS)","volume":"89 1","pages":"530-531"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 9th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEMS.2014.6908865","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Inkjet printing has been one of fascinating techniques for microfabrication owing to the characteristics of low manufacturing cost, low processing temperature, low material usage,...etc. [1, 2]. In this work, a Lift-off Printing (LoP) process combining conventional photolithography and inkjet printing processes is introduced to realize printed size-scalable silver microstructures with the line width of 5 up to 70 μm and the resistivity of ~5.7 μΩ · cm on a silicon substrate. In addition, an as-printed interdigitated capacitor with the electrode size and spacing of 10μm has been successfully demonstrated with a capacitance of 2.3 pF/mm2@10kHz.