S-TFT: an analytical model of polysilicon thin-film transistors for circuit simulation

Abstract

This paper describes the S-TFT model developed for poly-Si TFT which improves the accuracy dramatically. The proposed model emphasis is on deriving the large parasitic resistance characteristics at low Vds by adding the junction current to the on-current. The physical-based subthreshold and off-state current model are also considered. The model guarantees the continuities of the current and the derivatives. Compared to the RPI model, known to be the best model, the proposed model improved overall simulation speed by 40-50% due to the better convergence characteristics.