CMOS RF design-the low power dimension

Abstract

In many wireless applications power consumption of an RF-IC is more important than integration level due to battery life time considerations. This has been a weak point for CMOS, which has prevented its general acceptance for demanding applications such as cellular and paging. Growing attention is now being paid to low power design of CMOS RF ICs. This paper addresses issues such as technology requirement, transceiver architecture, circuit topologies as well as the extent of integration, in the context of power consumption.