Hao Zhang, Hiroki Matsutani, M. Koibuchi, H. Amano
{"title":"Dynamic Power Consumption Optimization for Inductive-Coupling based Wireless 3D NoCs","authors":"Hao Zhang, Hiroki Matsutani, M. Koibuchi, H. Amano","doi":"10.2197/ipsjtsldm.7.27","DOIUrl":null,"url":null,"abstract":"Inductive-coupling is yet another 3D integration technique that can be used to stack more than three knowngood-dies in a SiP without wire connections. Its power consumed for communication by inductive coupling link is one of big problems. A dynamic on/off link control for topology-agnostic 3D NoC (Network on Chip) architecture using inductive-coupling is proposed. The proposed low-power techniques stop the transistors by cutting off the bias voltage in the transmitter of the wireless vertical links only when their utilization is higher than the threshold. Meanwhile, the whole wireless vertical link will be shut down when the utilization is lower than the threshold in order to reduce the power consumption of wireless 3D NoCs. Full-system many-core simulations using power parameters derived from a real chip implementation show that the proposed low-power techniques reduce the power consumption by 43.8–55.0%, while the average performance overhead is 1.4% in wireless topology-agnostic 3D NoC.","PeriodicalId":38964,"journal":{"name":"IPSJ Transactions on System LSI Design Methodology","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2014-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IPSJ Transactions on System LSI Design Methodology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.2197/ipsjtsldm.7.27","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 2
Abstract
Inductive-coupling is yet another 3D integration technique that can be used to stack more than three knowngood-dies in a SiP without wire connections. Its power consumed for communication by inductive coupling link is one of big problems. A dynamic on/off link control for topology-agnostic 3D NoC (Network on Chip) architecture using inductive-coupling is proposed. The proposed low-power techniques stop the transistors by cutting off the bias voltage in the transmitter of the wireless vertical links only when their utilization is higher than the threshold. Meanwhile, the whole wireless vertical link will be shut down when the utilization is lower than the threshold in order to reduce the power consumption of wireless 3D NoCs. Full-system many-core simulations using power parameters derived from a real chip implementation show that the proposed low-power techniques reduce the power consumption by 43.8–55.0%, while the average performance overhead is 1.4% in wireless topology-agnostic 3D NoC.