A 23mW fully integrated GPS receiver with robust interferer rejection in 65nm CMOS

Abstract

Many mobile devices with personal navigation and location based services (LBS) are rapidly increasing in importance in our life. In particular, smart-phones with embedded GPS receivers are still growing their share and soon they will be the main products in the handset market. Co-existence of a GPS receiver together with cellular phones creates new challenges because leakage signals from the transmitters in 2G/3G systems are harmful interferers, making it difficult for the receiver to detect a weak GPS signal from satellites. In general, an external interstage SAW filter is used for rejecting blocking signals after the LNA. Recently, there have been attempts to remove the inter-stage SAW filter to minimize the number of external components required[1–3]. So, a single pre-select filter is only required to prevent the out-of-band signals from blocking the receiver between the antenna and the IC. Although previous publications utilize tuned LC loads to tolerate a strong interferer signal, the frequency selectivity of the LC resonators will show a limited performance because the center frequency of an LC-tuned structure is very dependent on PVT variations. In this paper, a fully integrated GPS receiver with robust characteristics against the large interferer signals is presented.