Characterizing the current degradation of abnormally structured MOS transistors using a 3D Poisson solver

Abstract

An efficient modeling methodology for abnormally structured MOS transistors is presented. Contrary to the previous method utilizing a 3D device simulator, only the 3D Poisson solver is used to characterize the current degradation effects by extracting the parasitic source and drain resistances, and the effective transistor width of the abnormal transistors. For the frequent modifications of the layout design, the easiness of the proposed method guarantees the efficient reflection of the current degradation effect in circuit simulation. This method is applied to 0.17 /spl mu/m DRAM process and the good agreements with the measured data are examined.