M. Saliva, F. Cacho, D. Angot, V. Huard, M. Rafik, A. Bravaix, L. Anghel
{"title":"面向电路级仿真的氧化物击穿紧凑模型的基础","authors":"M. Saliva, F. Cacho, D. Angot, V. Huard, M. Rafik, A. Bravaix, L. Anghel","doi":"10.1109/IRPS.2013.6532062","DOIUrl":null,"url":null,"abstract":"Gate oxide breakdown is an important reliability issue. This mechanism is widely investigated at device level but the development of a compact model and the assessment at circuit level is much more complex to handle. We first characterize soft and hard breakdown. Then a transistor-level model is presented. The model is calibrated for a large range of breakdown severity. Finally the model is used at circuit level. The impact of breakdown on both static current and ring oscillator frequency is discussed.","PeriodicalId":138206,"journal":{"name":"2013 IEEE International Reliability Physics Symposium (IRPS)","volume":"23 6","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Foundations for oxide breakdown compact modeling towards circuit-level simulations\",\"authors\":\"M. Saliva, F. Cacho, D. Angot, V. Huard, M. Rafik, A. Bravaix, L. Anghel\",\"doi\":\"10.1109/IRPS.2013.6532062\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gate oxide breakdown is an important reliability issue. This mechanism is widely investigated at device level but the development of a compact model and the assessment at circuit level is much more complex to handle. We first characterize soft and hard breakdown. Then a transistor-level model is presented. The model is calibrated for a large range of breakdown severity. Finally the model is used at circuit level. The impact of breakdown on both static current and ring oscillator frequency is discussed.\",\"PeriodicalId\":138206,\"journal\":{\"name\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"volume\":\"23 6\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Reliability Physics Symposium (IRPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2013.6532062\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Reliability Physics Symposium (IRPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2013.6532062","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Foundations for oxide breakdown compact modeling towards circuit-level simulations
Gate oxide breakdown is an important reliability issue. This mechanism is widely investigated at device level but the development of a compact model and the assessment at circuit level is much more complex to handle. We first characterize soft and hard breakdown. Then a transistor-level model is presented. The model is calibrated for a large range of breakdown severity. Finally the model is used at circuit level. The impact of breakdown on both static current and ring oscillator frequency is discussed.
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