无衬底漏电流的JFET钳位自举二极管(JPBD)集成到120V BCDMOS工艺

Sunglyong Kim, Jongjib Kim, Sunhak Lee, Hyemi Kim
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引用次数: 1

摘要

提出了一种实现无衬底漏电流的高压自举二极管用于120 V高压侧驱动的新概念,并通过二维仿真进行了验证。提出了高压JFET与中压二极管的组合,并对其进行适当修改,以避免基片正导时漏电流和关断时的高阻断电压,从而实现集成自举操作。仿真结果表明,在导通模式下,击穿电压为130 V, FVD(正向压降)为0.79 V,电压为100 A/cm2,无衬底漏电流。
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JFET pinched bootstrap diode (JPBD) without substrate leakage current integration to 120V BCDMOS process
A new concept to realize the usage of a high-voltage bootstrap diode without substrate leakage current for 120 V high-side-driver application is proposed and verified by 2D simulation. The combination of high-voltage (HV) JFET and medium-voltage (MV) diode with proper modification to avoid substrate leakage current at forward conduction state and high-blocking voltage at off state for integrated bootstrap operation is proposed. Simulation results showed 130 V of breakdown voltage and 0.79 V of FVD (forward voltage drop) @ 100 A/cm2 without substrate leakage current at conduction mode.
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