A VHF-Band Multichannel Direct Sampling Receiver Implementation Using Under-sampling Technique

This paper presents the analysis and design of a VHF Direct Sampling RF Receiver (DSR). The under-sampling technique has been adopted in this structure where the high-frequency RF signal is digitalized by a low-speed ADC. This technique allows better selection of the ADC dynamic range. In addition, using a lower sampling rate ADC enables a cost-effective design and energy-saving, as well as simplifies the signal processing in the digital domain. The prototype of the proposed receiver has been implemented on FPGA, a 200 MSPS commercial ADC is used to digitize the RF signal in the 200 MHz to 300 MHz range in Nyquist zone 3 and serves as the key component for the RF frontend. Our experimental results show that the proposed receiver meets the key criteria of the commercial receiver, with a sensitivity smaller than 0.225 µV, 90 dB proximity selectivity, and 100 dB dynamic range.