{"title":"带动态控制开关调谐压控振荡器的多频带单环锁相环频率合成器","authors":"Samuel M. Palermo, JosC Pineda de Gyve2","doi":"10.1109/MWSCAS.2000.952881","DOIUrl":null,"url":null,"abstract":"A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications is presented. A dynamically-controlled switched tuning voltage-controlled oscillator (VCO) is used to achieve superior frequency range and phase noise performance over a conventional PLL. Implemented in 1.4 /spl mu/m CMOS, the PLL has a 111-290 MHz range, phase noise of -92.3 dBc/Hz at a 50 kHz offset, and dissipates 9 mW from a 2.7 V supply.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A multi-band single-loop PLL frequency synthesizer with dynamically-controlled switched tuning VCO\",\"authors\":\"Samuel M. Palermo, JosC Pineda de Gyve2\",\"doi\":\"10.1109/MWSCAS.2000.952881\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications is presented. A dynamically-controlled switched tuning voltage-controlled oscillator (VCO) is used to achieve superior frequency range and phase noise performance over a conventional PLL. Implemented in 1.4 /spl mu/m CMOS, the PLL has a 111-290 MHz range, phase noise of -92.3 dBc/Hz at a 50 kHz offset, and dissipates 9 mW from a 2.7 V supply.\",\"PeriodicalId\":437349,\"journal\":{\"name\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2000.952881\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.952881","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A multi-band single-loop PLL frequency synthesizer with dynamically-controlled switched tuning VCO
A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications is presented. A dynamically-controlled switched tuning voltage-controlled oscillator (VCO) is used to achieve superior frequency range and phase noise performance over a conventional PLL. Implemented in 1.4 /spl mu/m CMOS, the PLL has a 111-290 MHz range, phase noise of -92.3 dBc/Hz at a 50 kHz offset, and dissipates 9 mW from a 2.7 V supply.
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